1. Field of the Invention
The present invention relates to a semiconductor device having a plurality of elements on one semiconductor substrate. The present invention also relates to a method of manufacturing a semiconductor device.
2. Description of the Related Art
U.S. Pat. No. 6,365,932 (corresponding to JP-A-2001-60634) discloses a semiconductor device that has a plurality of elements on one semiconductor substrate. In the semiconductor device, a silicon-on-insulator substrate (SOI substrate) is used as the semiconductor substrate. The SOI substrate includes a silicon substrate, an embedded insulating layer made of silicon dioxide layer, and a thin silicon layer disposed on the silicon substrate through the embedded insulating layer. A plurality of trenches is provided in the silicon layer so as to extend to the embedded insulating layer and polysilicon is filled into the trenches. Thereby, isolation trenches are formed. The isolation trenches and the embedded insulating layer define a plurality of element-forming regions in the silicon layer. In the element-forming regions, n-type metal-oxide semiconductors (nMOS) and p-type metal-oxide semiconductors (PMOS) that constitute an element, for example, an up-drain type metal-oxide semiconductor field-effect transistor (up-drain type MOSFET), an NPN transistor, and a complementary metal-oxide semiconductor (CMOS), are respectively formed.
In the SOI substrate, the element-forming regions can be defined in the silicon layer by the isolation trenches and the embedded insulating layer. Thus, the SOI substrate is suitable for forming a single-sided electrode element in which a pair of electrodes is disposed on one surface of the semiconductor substrate. However, the embedded insulating layer prevents an electric current from flowing in a thickness direction of the SOI substrate. Therefore, the SOI substrate is unstable for forming a double-sided electrode element in which a pair of electrodes is separately disposed on two surfaces of the semiconductor substrate. For example, the double-side electrode element includes a vertical MOS transistor or an insulated gate bipolar transistor (IGBT) for providing a high electric power.
US-A-2008-135932 (corresponding to JP-A-2008-166705) by the inventors discloses a semiconductor device that has a plurality of elements including a double-sided electrode element on one semiconductor substrate. When the semiconductor device is manufactured, a bulk semiconductor substrate is prepared, and a plurality of blind isolation trenches extending from an upper surface of the semiconductor substrate is provided so as to surround respective element-forming regions. Then, the semiconductor substrate is polished from a lower-surface side until an end of each of the blind isolation trenches is exposed to an outside of the semiconductor substrate. Thereby, the isolation trenches penetrate the semiconductor substrate from the upper surface to the lower surface. After that, a plurality of elements is formed in the respective element-forming regions defined by the isolation trenches.
In the above-described semiconductor device, the semiconductor substrate has a uniform thickness due to the polish. Thus, in a case where a plurality of elements including a double-sided electrode element or an element in which electric current flows in the thickness direction of the semiconductor device is integrated in the semiconductor substrate, a plurality of elements having a different property, for example, a breakdown voltage and an on-resistance, is difficult to be integrated. For example, a plurality of IGBTs having a different breakdown voltage is difficult to be integrated.
Furthermore, when the uniform thickness of the semiconductor substrate is reduced for reducing the on-resistance of the double-sided electrode element, a mechanical strength of the semiconductor substrate may be reduced. Thus, the semiconductor substrate may crack when the semiconductor substrate is diced into chips or when the semiconductor substrate is carried.